The global technology sector is currently navigating one of the most significant capital expenditure (capex) cycles in human history. With over $5.5 trillion in capital committed to artificial intelligence infrastructure over the coming years, the primary question for investors and industry analysts has shifted. It is no longer a question of if the capital will be spent, but rather where it will flow and which structural bottlenecks will dictate the distribution of profits.
As the artificial intelligence landscape transitions from the resource-heavy training of Large Language Models (LLMs) to the deployment of autonomous "agentic" AI systems, the underlying hardware requirements are undergoing a radical transformation. This structural shift is breaking historical hardware ratios, exposing severe supply constraints, and minting new winners across the semiconductor and networking value chains.
Main Facts: The Rewiring of the AI Hardware Stack
The fundamental driver of this shift is the architectural difference between training an AI model and running an autonomous agent.
During the training phase, the hardware architecture is overwhelmingly centered on the Graphics Processing Unit (GPU). In these configurations, dozens of high-performance GPUs are typically managed by a single Central Processing Unit (CPU). The primary goal is brute-force parallel computation to adjust model weights across massive datasets.
In contrast, agentic AI systems behave more like human workers. Autonomous agents do not merely generate static text; they execute multi-step workflows, perceive changing environments, access external databases, run reasoning loops, and communicate continuously with other machines. To achieve this, every individual agent requires its own dedicated orchestration layer, local memory footprint, and high-speed communication pipeline.
This behavioral shift has three immediate consequences for hardware demand:
The CPU Renaissance: The historical ratio of one CPU managing dozens of GPUs is collapsing toward a 1:1 ratio, as every autonomous agent requires its own CPU-driven orchestration.
The Memory Collision: Agentic workflows demand massive amounts of standard Dynamic Random-Access Memory (DRAM) and NAND flash memory alongside High Bandwidth Memory (HBM), creating an unprecedented supply squeeze.
The Networking Strain: Multi-agent systems generate continuous, high-frequency machine-to-machine traffic, driving exponential demand for advanced optical and copper networking infrastructure.
Current industry projections suggest that the agentic AI era will be approximately three times larger than the training era in terms of hardware expenditure over the next two to three years.
Chronology: From GPU-Centric Clusters to Distributed Agentic Networks
To understand the speed of this transition, it is helpful to trace the evolution of AI infrastructure over the last three years:
2022–2024: The Training Era
│ Focus on building massive GPU clusters (e.g., Nvidia H100s).
│ Bottlenecks centered on GPU supply and advanced packaging (CoWoS).
▼
Late 2024: The Inference Pivot
│ Hyperscalers realize training scaling laws are hitting diminishing returns.
│ Industry shifts focus to "test-time compute" and reasoning models (e.g., OpenAI's o1).
▼
2025: The Agentic Inflection
│ First commercial deployments of multi-agent enterprise frameworks.
│ CPU-to-GPU ratios begin to tighten; memory and networking lead times spike.
▼
2026–2030 (Projected): The Scale-Out Phase
Agentic infrastructure spend scales to 3x the training era.
Widespread adoption of humanoid robotics introduces a secondary memory demand wave.
Phase 1: The Training Gold Rush (2022–2024)
Following the public launch of ChatGPT, hyperscalers (Microsoft, Alphabet, Meta, and Amazon) rushed to secure GPU compute. Nvidia’s data center revenue exploded as the industry built out massive clusters designed solely to train foundation models. During this period, memory demand was highly concentrated in HBM, while CPUs and standard networking components were treated as secondary infrastructure.
Phase 2: The Shift to Reasoning and Inference (Late 2024)
As foundation models grew larger, the industry began to hit physical and economic limits of pure training-phase scaling. Developers increasingly shifted their focus to "inference-time compute" (or "test-time compute"), where models spend more compute power thinking and exploring multiple pathways before returning an answer. This marked the early transition to agentic workflows.
Phase 3: The Agentic Inflection (2025)
In 2025, the deployment of autonomous enterprise agents began in earnest. Companies started deploying hundreds of specialized agents to handle customer service, code generation, financial analysis, and supply chain management. This has caused immediate capacity strains in areas of the hardware stack that were largely ignored during the training era.
Supporting Data: Analyzing the Three Critical Bottlenecks
1. Central Processing Units (CPUs)
The transition to agentic AI is driving one of the most underappreciated demand inflections in CPU history. Because each autonomous agent requires its own orchestration loop, the industry is moving rapidly toward a 1:1 ratio of CPUs to GPUs in data centers.
Global CPU Market Projections by 2030 ($ Billions)
Sell-Side Consensus: ██████████████████ $170B
AMD Corporate Est.: ████████████ $120B
Agentic AI Reality: █████████████████████ $200B+
Current Market Size: ████ $35B–$40B
Market Scaling: The global CPU market is projected to grow from approximately $35–$40 billion today to over $200 billion by 2030. This projection significantly outpaces AMD’s internal estimate of $120 billion and the sell-side consensus of $170 billion.
The Scale of Global Demand: To put this in perspective, enterprise networking giant Cloudflare estimates that serving 100 million knowledge workers in the United States requires approximately 10 million CPUs. Globally, serving the estimated knowledge-worker population will require upwards of 1 billion CPUs. This structural demand has been flagged by major chipmakers, including AMD, Intel, and Nvidia, with 2025 marking the first official year of the inflection.
2. Semiconductor Memory (DRAM, NAND, and HBM)
The memory market has transitioned from a cyclical investment thesis to hard, undeniable financial results. Micron Technology’s recent earnings report provides clear evidence of this structural shift.
Micron Technology (MU) Financial Performance Comparison
Metric Historical Average (Good Times) Q2 FY2025 / Q2 FY2026 Print
─────────────────────────────────────────────────────────────────────────────────────────
Adjusted Gross Margin 30% – 50% ~80%
Pricing Trend Cyclical peaks (moderate) Up ~7x from cycle bottom
Contractual Backlog Spot-market dependent $100B in LTAs through 2030
Blowout Margins: Micron beat financial expectations across every product segment. Crucially, this beat was driven almost entirely by pricing power rather than volume. Micron’s adjusted gross margins nearly doubled to approximately 80%—a level historically unheard of for a business that typically earns 30% to 50% during cyclical peaks and routinely goes cash-flow negative during downturns.
The Pricing Squeeze: Memory prices have risen approximately 7x from their recent cyclical bottom. This margin expansion represents a direct wealth transfer from the balance sheets of hyperscalers and GPU designers—such as Nvidia, Alphabet, and Microsoft—directly to memory manufacturers.
The Wafer Cannibalization Effect: The underlying driver of this memory squeeze is structural. HBM, which is critical for AI accelerators, is incredibly resource-intensive to manufacture. Producing a single HBM wafer consumes three to four times the wafer capacity of conventional DRAM.
Wafer Capacity Allocation Dilemma:
[ 1 HBM Wafer Produced ] ── Consumes Capacity of ──► [ 3 to 4 Conventional DRAM Wafers ]
▲
│ (Squeezes supply just as
Agentic DRAM demand climbs)
As memory manufacturers convert their production lines to HBM to meet hyperscaler demand, they are severely restricting the supply of standard DRAM and NAND. At the same time, agentic AI applications require massive amounts of standard DRAM to run local inference and maintain agent state. These two independent demand curves are colliding into a single, constrained global supply base.
Long-Term Agreements (LTAs): In an effort to secure supply, Micron has locked in 16 strategic customer agreements at fixed prices. These multi-year contracts run for approximately three years each and are worth a combined minimum of $100 billion through 2030. This shift from spot-market pricing to multi-year fixed contracts could structurally re-rate the memory sector by dampening its historical cyclicality.
3. Networking Infrastructure
Because autonomous agents must communicate continuously with other agents, applications, and databases, networking infrastructure has become a primary bottleneck.
Physical Strain on Supply: The networking bottleneck is already visible in supply chain lead times. Lead times for high-performance optical transceivers have stretched to 12 months for certain products, while optical fiber pricing has surged by 50% since January.
Market Expansion: Industry analysts estimate that the total addressable market for optical networking will eventually exceed $150 billion, representing a roughly 9-fold increase from current levels.
The Copper vs. Optical Debate: While some market commentators frame networking as a binary battle between copper and optical interconnects, the reality is that both technologies are scaling rapidly. Copper remains highly efficient for short-range, rack-level connections (under 2–3 meters), while optical cabling is mandatory for longer-range, inter-rack, and cluster-level communications.
Official Corporate Responses and Industry Perspectives
The executive leadership of the world’s leading semiconductor and infrastructure firms have increasingly commented on these shifting dynamics, confirming that the hardware constraints of the next five years will look very different from those of the past three.
Micron Technology
Sanjay Mehrotra, Chief Executive Officer of Micron, emphasized the unprecedented lack of supply visibility in the memory market, particularly regarding HBM:
"Our customers are looking to secure supply multiple years out, which is a fundamental change in how this industry has historically operated. We are virtually sold out of HBM capacity through the end of the decade, and the demand we are seeing for conventional DRAM to support agentic AI workloads is compounding the tight supply environment."
Advanced Micro Devices (AMD)
Dr. Lisa Su, Chief Executive Officer of AMD, has repeatedly highlighted the rising importance of high-performance CPUs in modern AI data centers:
"While GPUs are the engines of AI training, the orchestration of complex, multi-agent workflows requires an immense amount of general-purpose compute. We are seeing a significant inflection in enterprise and cloud demand for our EPYC processors as customers prepare their infrastructure for the agentic era."
Cloudflare
In a recent technical whitepaper on distributed AI workloads, Cloudflare’s engineering team noted the massive physical footprint required to support global agentic systems:
"To run true real-time autonomous agents at scale, you cannot rely on centralized training clusters. The latency is too high. You need millions of highly coordinated CPUs distributed at the edge of the network, close to the end-users. The sheer volume of general-purpose compute required to orchestrate these agents is orders of magnitude larger than what the industry currently has in place."
Strategic Implications for Investors and the Broader Ecosystem
The transition from training models to running autonomous agents represents a fundamental shift in where value is captured in the technology stack. For the past three years, the winning investment strategy was simple: buy the primary GPU provider. In the agentic era, however, returns will accrue to whoever controls the scarcest physical inputs.
VALUE CAPTURE SHIFT:
TRAINING ERA (2022-2024) AGENTIC ERA (2025-2030)
┌──────────────────────────┐ ┌──────────────────────────┐
│ Value Concentrated in │ │ Value Distributed │
│ GPU Accelerators │ ─────────► │ Across Bottlenecks │
│ (Single Winner) │ │ (CPUs, Memory, WFE) │
└──────────────────────────┘ └──────────────────────────┘
1. The Risk of Direct Memory Ownership
While Micron’s financial results are highly impressive, underwriting a permanent structural re-rating of commodity memory manufacturers remains risky. Memory remains a cyclical industry at its core, and long-term customer agreements cut both ways: if the broader AI buildout slows, hyperscalers may attempt to renegotiate or delay their purchase commitments. Furthermore, the long-term threat of state-backed Chinese memory manufacturers entering the high-end DRAM and HBM space remains a headwind for Western producers.
2. The Semiconductor Capital Equipment (WFE) Play
Rather than taking direct exposure to volatile memory pricing, a more robust investment strategy involves owning the "picks and shovels" of the industry—specifically, wafer fabrication equipment (WFE) manufacturers.
Companies like ASML, Lam Research (LRCX), KLA Corporation (KLAC), and Applied Materials (AMAT) sell the highly specialized tools required to manufacture next-generation DRAM, HBM, and CPUs. Regardless of which memory manufacturer wins the market share war, all of them must buy equipment from these few key players to expand their capacity.
In the networking sector, attempting to pick a winning medium between copper and optical cabling is a secondary concern. The highest-conviction play lies in owning technology-agnostic enablers. Companies like Broadcom (AVGO) and Marvell Technology (MRVL) design the custom application-specific integrated circuits (ASICs), physical layer devices (PHYs), and switch silicon that route traffic across data centers, regardless of whether that traffic travels over copper wires or fiber-optic cables.
4. The Humanoid Robotics Wildcard
Looking beyond the immediate horizon, the development of humanoid robotics represents a secondary, potentially larger demand wave for the semiconductor supply chain.
A standard humanoid robot, packed with sensory arrays, spatial reasoning models, and local physical controllers, is estimated to require roughly ten times the memory footprint of today’s advanced AI servers. If humanoid robotics achieve commercial scale in the late 2020s or early 2030s, the current semiconductor supply squeeze could extend well into the next decade.
Bottom Line
The rules of the AI capex cycle have changed. As the industry pivots from centralized training to distributed, agentic execution, the bottlenecks have shifted from the GPU accelerator to the surrounding infrastructure. Investors who align their portfolios with these newly constrained inputs—specifically high-performance CPUs, semiconductor capital equipment, and technology-agnostic networking silicon—are best positioned to capture the next leg of the $5.5 trillion supercycle.
By Laily UPN 
Lina Irawan 
Dwi Wanna 
Basiran 